Partha Mitra,Angsuman Sarkar,




Decoupling capacitor,Flower Pollination Algorithm,Multiple Power Supply,Power Distribution Network,System-on-chip,


Designing an efficient power distribution network is a major challenge in modern day system-on-chip. During manufacturing, the signal integrity problems such as resistive voltage drop, inductive noise at pad locations and electro-migration may result silicon failures. This paper deals with the analysis of supply noise using multiple power supply and use of decoupling capacitors for reduction of supply noise.  In this work flower pollination algorithm has been used for decap estimation so that the supply noise can be reduced significantly and various design parameters remains at its best. The purpose of this work is to reduce the supply noise with effecting the other design parameters of the chip.  In this work the supply noise has been reduced upto 70.2% with reduction of 81.6% in power consumption and 17.07 % increment in delay parameters. This approach can be used for any system-on-chip.


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