Gyan Prabhakar,Rajendra Pratap,R.K. Singh,Abhiskek Vikram,



Charge Pump,Ring Oscillator,NOC clock generator,clocked D-FF,CMLS level shifter,


This paper proposes the design strategy of low power Dickson charge pump using associated block who is help in proper functionality at full chip level because of single charge circuit cannot be design for portable handheld based application. When a low power optimization based high speed charge pump circuit is designed at system level, then entire circuit block operates at different supply voltage so it requires. For this, the circuit designer needs a level shifter to manage the dual supply voltage and provide a non-overlapping ring oscillator to provide the clock to the circuit to operate at high speed. CMOS clocked circuit is required to work in sufficient voltage level pushup up to end level. Thus, In this paper, the actual simulation results using the CMOS 180nm technology along with each block are shown. Along with this, good brief discussion on each block has also been done.


I. Louie Pylarinos. “Proceedings of the IEEE International Symposium on Circuits, 2003.
II. Feng pan and Tapan Samaddar, “Charge pump circuit designconc”,McGraw-Hill Electronic Engineering :ISBN-13: 978-007147045, 2006.
III. Moisiadisa Y, Bourasc I, and A. Arapoyanni, “Charge Pump Circuits for Low-voltage Applications”, Taylor and Francis VLSI Design. Vol 15, pp:477–483, 2002.
IV. Wu, J.T. and L.K. Chang, “MOS Charge pump for Low Voltage Operation”,.IEEE Journal of solid-state circuits.vol 33 pp: 592-597,1998.
V. Dickson, J.F. On-chip high voltage generation in NMOS integrated circuits using an improved voltage multiplier technique. IEEE journal of Solid-State circuits, vol 11, pp: 374-378, 1976.
VI. G. Palumbo, D. Pappalardo, M. Gaibotti, “Charge Pump Circuits- Power Consumption Optimization”, IEEE Trans. Circuits and Systems I: Fundamental Theory and Applications. Vol 49, pp: 1535–1542, 2002.
VII. R. L. Geiger, P. E. Allen, and N. R. Strader, “VLSI-Design Techniques for Analog and Digital Circuits”, McGraw-Hill Publishing Co. ISBN 0-07-023253-9, 1990.
VIII. Prabhakar Gyan., Singh R.K., Vikram A, “Boosted Clock Generator Using NAND Gate for Dickson Charge Pump Circuit”,Smart Innovation, Systems. and Technologies(Springer, Singapore.), vol 2(107), pp: 39-49,2019.
IX. Jacob Baker, Harry W. Li and David E. Boyce, CMOS Circuit Design, Layout, and Simulation Department of Electrical Engineering Microelectronics Research Center the University of Idaho.
X. Retdian, N., Takagi, S. and Fujii, N, “Voltage controlled ring oscillator with wide tuning range and fast voltage swing IEEE Asia- Pacific Conference”, ASIC on. Proceedings: pp: 201-204. 2002.
XI. Yongbo Liua, b, Zhengyong Zhua, Huilong Zhua, “Charge pumps, test technique using CMOS ring oscillator on the leakage issue”, Microelectronics Journal vol 68, pp: 40–45, 2017.
XII. Vladimir Stojanovic and Vojin G.(1999).„Comparative Analysis of Master–Slave Latches and Flip-Flops for High-Performance and Low-Power Systems. IEEE Journal of Solid-State Circuits. 34(4):536-548, 1999
XIV. G. Prabhakar, A. Vikram , Rajendra Pratap, R.K. Singh, “Current contention Problem in Level shifter”,International Journal of Recent Technology and Engineering, Vol 8, pp: 11699-11703, 2019
XV. Mohammad Torikul Islam Badal, Mamun Bin Ibne Reaz, Araf Farayez, Siti A. B. Ramli, and Noorfazila Kamal., “Design of a Low-power CMOS Level Shifter for Low-delay SoCs in Silterra 0.13 μm CMOS Process”, Journal of Engineering Science and Technology Review , vol 4 pp: 10-15, 2017.
XVI. Prabhakar Gyan, Rabindra Kumar Singh and Abhishek Vikram, “Improved Efficiency and Voltage Gain Conversion Ratio using Inductor Model based modified Dickson Charge Pump”, Journal of Engineering Science and Technology review.vol 11,pp: 1-7.2018.
XVII. Prabhakar Gyan, Rabindra Kumar Singh and Abhishek Vikram, “Inductor-Based Modified Dickson Charge Pump Boost Voltage Converter with Higher Efficiency”,. Information and Communication Technology for
Intelligent Systems, Smart Innovation, Systems and Technologies Vol 2(107): pp: 39-49, 2019
XVIII. P. R. Gray and R. G. Meyer,“Analysis and Design of Analog Integrated Circuits”, 3rd ed., John Wiley and Sons.. ISBN 0-471-57495-3, 1993.

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