Performance Analysis Of Efficient Carry Select Adder


M. Sangeetha,Balaji.S,John Paul Praveen A,Mohanraj R,



CSLA,delay performance,low power design,arithmetic unit,Area,


Carry Select Adder(CSA)has multiplexer and also Ripple Carry Adder(RCA).Logical operation in traditional CSLA and BEC depends on CSLA is used to analyze the dependence in data and logic operations which is redundant is identified. Operation speed is an constraint which is obtained when multipliers are designed. Electronic components require more battery backup. A proposed adder speeds 40% to 90%. The reported work decreases the area and delay by the use of 2:1 mux. And implement the result by using FPGA.


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